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atomic 内存序_并行编程的内存顺序 2020-11-23

发布时间:2025/3/21 编程问答 44 豆豆
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typedef enum memory_order {

memory_order_relaxed, // 不对执行顺序做保证

memory_order_acquire, // 本线程中,所有后续的读操作必须在本条原子操作完成后执行

memory_order_release, // 本线程中,所有之前的写操作完成后才能执行本条原子操作

memory_order_acq_rel, // 同时包含 memory_order_acquire 和 memory_order_release

memory_order_consume, // 本线程中,所有后续的有关本原子类型的操作,必须在本条原子操作完成之后执行

memory_order_seq_cst // 全部存取都按顺序执行

} memory_order;

另外rust 相关文档,写的好理解;

Relaxed

No ordering constraints, only atomic operations.

Corresponds to memory_order_relaxed in C++20.

Release

When coupled with a store, all previous operations become ordered before any load of this value with Acquire (or stronger) ordering. In particular, all previous writes become visible to all threads that perform an Acquire (or stronger) load of this value.

Notice that using this ordering for an operation that combines loads and stores leads to a Relaxed load operation!

This ordering is only applicable for operations that can perform a store.

Corresponds to memory_order_release in C++20.

Acquire

When coupled with a load, if the loaded value was written by a store operation with Release (or stronger) ordering, then all subsequent operations become ordered after that store. In particular, all subsequent loads will see data written before the store.

Notice that using this ordering for an operation that combines loads and stores leads to a Relaxed store operation!

This ordering is only applicable for operations that can perform a load.

Corresponds to memory_order_acquire in C++20.

AcqRel

Has the effects of both Acquire and Release together: For loads it uses Acquire ordering. For stores it uses the Release ordering.

Notice that in the case of compare_and_swap, it is possible that the operation ends up not performing any store and hence it has just Acquire ordering. However, AcqRel will never perform Relaxed accesses.

This ordering is only applicable for operations that combine both loads and stores.

Corresponds to memory_order_acq_rel in C++20.

SeqCst

Like Acquire/Release/AcqRel (for load, store, and load-with-store operations, respectively) with the additional guarantee that all threads see all sequentially consistent operations in the same order.

Corresponds to memory_order_seq_cst in C++20.

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